1. Field of the Invention
The present invention relates to a level converter circuit employed in a semiconductor integrated circuit which utilizes both a positive potential source and a negative potential source.
2. Description of the Related Art
TTL logic circuits that have heretofore been used as logic circuits process logic signals having positive potential levels (i.e. TTL level signal). Such TTL logic circuts have features that the operating delay time is comparatively large, because the transistors employed in the TTL logic circuits are driven into saturated condition, but that the electric power consumption is small.
ECL logic circuits which are another type of widely used logic circuits process logic signals having negative potential levels (i.e. ECL level signal). The ECL logic circuits have such features that the operating delay time is small, because the transistors employed in the ECL logic circuits are driven only in unsaturated condition, but that the power consumption is relatively large, because a differential amplifier used in the ECL logic circuit allows a constant current flowing therethrough.
Generally, it is demanded in semiconductor logic integrated circuits that a circuit operates at a highspeed with a low power consumption and occupies a small area on a semiconductor chip. For resolving those demands, a combination of both TTL logic circuit and ECL logic circuit formed in the same chip has been conceived. In such case, the circuit must process not only the TTL level signal such as the ALS (Advanced Low-Power Schottky) TTL level signal with a positive potential source (+5.0 V) which is widely used for the conventional TTL logic circuits but also the ECL level signal such as ECL-10 KH, ECL-100 K level signal with the negative potential source (-4.5 V, -5.2 V, etc.) which is also used for the conventional ECL logic circuits Therefore, a level converter circuit converting between TTL and ECL levels is required that is interposed between a circuit, such as a TTL circuit, operating with the positive potential source and ground potential and a circuit, such as ECL circuit, constituted operating with the negative potential source and ground potential.
As the above-mentioned level converter circuit, a differential amplifier circuit was conventionally inserted between a TTL-type logic circuit operating with the positive potential source (Vcc) and the ground potential (GND) and the ECL-type logic circuit operating with the negative potential source (V.sub.EE) and the ground potential. This level converter circuit operates with the positive potential source V.sub.CC and the negative potential source V.sub.EE. The conventional level converter circuit having the differential amplifier circuit, however, consumed a large power in the operation mode, since the current steadily flowed through the differential amplifier.
Furthermore, the differential amplifier circuit necessitates, a reference voltage source and a constant current source which occupies a relatively large area on a semiconductor chip. Therefore, it has been difficult to fabricate the above integrated circuit including the differential amplifier type level converter at a high integration scale.